Fault attacks on hardware implementations of cryptographic algorithms have been shown to be very effective when attempting to extract the secret key. As a result, incorporating some form of fault detection/tolerance into cryptographic devices is necessary for security purposes as well as for data integrity.
Fault detection/tolerance can be achieved through massive redundancy but a less expensive approach based on error detection codes is possible.
In this talk we present various error detection codes that proved be effective for protecting different ciphers against fault attacks. We then discuss the granularity of the codes, the frequency at which checks must be performed, and the resulting detection coverage.
Audio (MP3 File, Podcast Ready)
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